SMSC COM20020 User Manual

COM20020COM20020 ULANCUniversal Local Area Network Controllerwith 2K x 8 On-Board RAMFEATURES• 24-Pin Embedded Network Controller/Transceiver/RAM• Ide

10 ALERT BURST EOT DID DID ALERT BURST ENQ DID DIDIdle TimeThe Idle Time is associated with a NETWORKRECONFIGURATION. Figur

11ALERTBURSTACKALERTBURSTNAKData PacketsA Data Packet consists of the actual data beingsent to another node. It is sent by the followingsequence:• An

12SYSTEM DESCRIPTIONMICROCONTROLLER INTERFACEThe top halves of Figures 2 and 3 illustratetypical COM20020 interfaces to themicrocontrollers. The inte

13AD0-AD7nINT1RESETnRDnWRA15AD0-AD2, D3-D7nCSnRESET INnRD/nDSnWR/DIRnINTRA2/BALEALEA0/nMUXXTAL1XTAL2XTAL1XTAL2GNDRXINnPULSE1nPULSE2nTXEN27 pF27 pF8051

14RXINnPULSE1nPULSE2nTXENGNDTraditional HybridConfigurationRXINnPULSE1nPULSE217, 19,4, 13, 145.6K1/2W5.6K1/2W0.01 uF1KV1211-5V0.47uF10uF+30.47uF++5VuF

15TRANSMISSION MEDIA INTERFACEThe bottom halves of Figures 2 and 3 illustratethe COM20020 interface to the transmissionmedia used to connect the node

16FIGURE 5 - DIPULSE WAVEFORM FOR DATA OF 1-1-020MHZCLOCK(FOR REF.ONLY)nPULSE1nPULSE2DIPULSERXIN1 0100ns100ns200ns400ns1COM20020 COM20020 COM20020+VCC

17In typical applications, the serial backplane isterminated at both ends and a bias is providedby the external pull-up resistor.The RXIN signal is di

18MICRO-SEQUENCERANDWORKINGREGISTERSSTATUS/COMMANDREGISTERRESETLOGICRECONFIGURATIONTIMERNODE IDLOGICOSCILLATORTX/RXLOGICADDITIONALREGISTERSADDRESSDECO

19Table 1 - Typical MediaCABLE TYPENOMINALIMPEDANCEATTENUATIONPER 1000 FT.AT 5MHZRG-62 Belden #8626293Ω5.5dBRG-59/U Belden #8910875Ω7.0dBRG-11/U Belde

2TABLE OF CONTENTSFEATURES...

20REGISTER ADDRESSREADMSB LSBSTATUSDIAG.STATUSADDRESSPTR HIGHADDRESSPTR LOWDATARESERVEDCONFIG-URATIONTENTIDNODEIDSETUPNEXT ID0001020304050607RIMY-RECO

21REGISTERADDRESSWRITEMSB LSBINTERRUPTCOMMANDADDRESSPTR HIGHADDRESSPTR LOWDATARESERVEDCONFIG-URATIONTENTIDNODEIDSETUPNEXT ID0001020304050607RIRDDATAA7

22INTERNAL REGISTERSThe COM20020 contains eight internal registers.Tables 2 and 3 illustrate the COM20020register map. Reserved locations s

23Transmitter is disabled, the Receiver portion ofthe device is still functional and will provide theuser with useful information about the network. T

24Configuration RegisterThe Configuration Register is a read/writeregister which is used to configure the differentmodes of the COM20020. The Config

25Table 4 - Status RegisterBIT BIT NAME SYMBOL DESCRIPTION 7 ReceiverInhibitedRI This bit, if high, indicates that the receiver is not enabled becau

26Table 5 - Diagnostic Status RegisterBIT BIT NAME SYMBOL DESCRIPTION7 My Reconfiguration MY-RECONThis bit, if high, indicates that a past reconfigura

27Table 6 - Command RegisterDATA COMMAND DESCRIPTION0000 0000 ClearTransmitInterruptThis command is used only in the Command Chaining operation. Plea

28Table 7 - Address Pointer High RegisterBIT BIT NAME SYMBOL DESCRIPTION7 Read Data RDDATA This bit tells the COM20020 whether the following accesswil

29Table 9 - Configuration RegisterBIT BIT NAME SYMBOL DESCRIPTION7 Reset RESET A software reset of the COM20020 is executed by writing a logic "1

3controller optimized for use in industrial andautomotive applications. Using an ARCNETprotocol engine is the ideal solution for factoryautomation ap

30Table 10 - Setup RegisterBIT BIT NAME SYMBOL DESCRIPTION7 Pulse1 Mode P1MODE This bit determines the type of PULSE1 output driver used inBackplane M

31Address Pointer RegisterLow2K x 8RAM11Data Register8I/O Address 04HI/O Address 03H11-Bit CounterMemoryAddress BusMemoryData BusD0-D7HighI/O Address

32INTERNAL RAM The integration of the 2K x 8 RAM in theCOM20020 represents significant real estatesavings. The most obvious ben

33• The pointer may now be read to determinehow many transfers were completed.The software flow for controlling theConfiguration, Node ID, Tentative I

34SIDDIDCOUNT = 256-NNOT USEDDATA BYTE 1DATA BYTE 2DATA BYTE N-1DATA BYTE NNOT USEDSIDDID0COUNT = 512-NNOT USEDDATA BYTE 1DATA BYTE 2DATA BYTE N-1DATA

35buffer address 2 contains a zero or non-zerovalue. The format of the buffer is shown inFigure 8. Address 0 contains the SourceIdentifier (SID); Ad

36The third possibility which may occur after aFREE BUFFER ENQUIRY is issued is if thedestination node does not respond at all. In thiscase, the TA b

37TRI RI TA POR TEST RECONTMA TTATMA TTATRIMSB LSBFIGURE 9 - COMMAND CHAINING STATUS REGISTER QUEUECOMMAND CHAININGThe Command Chaining operation allo

38In the Command Chaining Mode, at any timeafter the first command is issued, the processorcan issue a second "Enable Transmit from Pagefnn"

39the status of the receive operation is doublebuffered in order to retain the results of the firstreception for analysis by the processor,therefore t

4DESCRIPTION OF PIN FUNCTIONSDIP PINNO.PLCC PINNO.NAMESYMBOL DESCRIPTIONMICROCONTROLLER INTERFACE1-3 1-3 Address0-2A0/nMUX,A1,A2/ALEInput. On a non-m

40INITIALIZATION SEQUENCEBus DeterminationWriting to and reading from an odd addresslocation from the COM20020's address spacecauses the COM20020

41node with the same ID does not exist on thenetwork. Once it is determined that the ID in theNode ID Register is unique, the software shouldwrite a

42network. This feature is useful because itminimizes the need for human intervention.When a value placed in the Tentative IDRegister matches the Nod

43OPERATIONAL DESCRIPTIONMAXIMUM GUARANTEED RATINGS*Operating Temperature Range...

44PARAMETER SYMBOL MIN TYP MAX UNIT COMMENTLow Output Voltage 1 (nPULSE1 in Normal Mode, nPULSE2, nTXEN)High Output Voltage 1 (nPULSE1 in Normal Mode,

45CAPACITANCE (TA = 25°C; fC = 1MHz; VDD = 0V)Output and I/O pins capacitive load specified as follows:PARAMETER SYMBOL MIN TYP MAX UNIT COMMENTInput

46TIMING DIAGRAMSAD0-AD2,VALIDnCSt1t3t8T is the Arbitration Clock Period.T is identical to XTAL1 if SLOW ARB = 0,*T is twice XTAL1 period if SLOW ARB

47AD0-AD2,VALIDnCSt1t3t8T is the Arbitration Clock Period.T is identical to XTAL1 if SLOW ARB = 0,*T is twice XTAL1 period if SLOW ARB = 1ALEVALID DAT

48AD0-AD2,VALIDnCSt1t3t8T is the Arbitration Clock Period.T is identical to XTAL1 if SLOW ARB = 0,*T is twice XTAL1 period if SLOW ARB = 1ALEVALID DAT

49AD0-AD2,VALIDnCSt1t3t8T is the Arbitration Clock Period.T is identical to XTAL1 if SLOW ARB = 0,*T is twice XTAL1 period if SLOW ARB = 1ALEVALID DAT

5DIP PINNO.PLCC PINNO.NAMESYMBOL DESCRIPTION19 23 nReset in nRESET IN Input. This active low signal issued by themicrocontroller executes a hardware

50A0-A2VALID DATAVALIDD0-D7nCSt6t1t7t3t5T is the Arbitration Clock Period.T is identical to XTAL1 if SLOW ARB = 0,*T is twice XTAL1 period if SLOW ARB

51A0-A2VALID DATAVALIDD0-D7nCSt8t1t9t3t6T is the Arbitration Clock Period.T is identical to XTAL1 if SLOW ARB = 0,*T is twice XTAL1 period if SLOW ARB

52A0-A2VALID DATAVALIDD0-D7t1t3t5t6t7ParameterAddress Setup to nWR ActivenCS Setup to WR ActiveCycle Time (nWR Low to Next Time Low)**Valid Data Setup

53A0-A2VALID DATAVALIDD0-D7Parametermin max unitsnCSt8t1t9t3t6T is the Arbitration Clock Period.T is identical to XTAL1 if SLOW ARB = 0,*T is twice XT

54nPULSE2t1t3t7ParameternPULSE1, nPULSE2 Pulse WidthnPULSE1, nPULSE2 OverlapRXIN Periodmin100-10max unitsnSnSnPULSE1t1* t1 = 2 x (crystal period) for

55nPULSE1t2* t2,t7,t10 = 4 x (crystal period) for clock frequencies other than 20 MHz.t3* t3,t11 = 8 x (crystal period) for clock frequencies other th

56t1t3ParameterInput Clock High TimeInput Clock Periodmin2050max unitsnSnSXTAL1t1t4 Input Clock Frequency100t2 Input Clock Low TimenSt320typ10t220 MHz

57AA1BB1CDD1D2D3EFGR.160-.180.090-.120.013-.021.026-.032.020-.045.485-.495.450-.456.390-.430.300 REF.050 BSC.042-.056.042-.048.025-.045DIM 28LJ .000-.

58E1 EBasePlaneSeatingPlaneDSB1eBA2AA1LNote: All dimensions are in inches.AeCBeDIMAA1A2BB1CDEE1eeAeBLS24L.090-.150.020-.065.145-.155.016-.021.060-.07

59COM20020 ERRATA SHEETPAGE SECTION/FIGURE/ENTRY CORRECTIONDATEREVISED5 Pin No. 18/DESCRIPTION See Italicized Text 5/29/968 Network Protocol See Itali

6DIP PINNO.PLCC PINNO.NAMESYMBOL DESCRIPTIONinstead, it must be connected to XTAL1 witha 390Ω pull-up resistor, and XTAL2 shouldbe left floating.

STANDARD MICROSYSTEMS CORP.Circuit diagrams utilizing SMSC products are included as a means of illustratingtypical applications; consequently complet

7Invitationto Transmit tothis ID?YNFree BufferEnquiry tothis ID?SOH?Y NY NRI?Write SIDto BufferDID=0?DID=ID?Write Bufferwith PacketCRCOK?LENGTHOK?DID=

8PROTOCOL DESCRIPTIONNETWORK PROTOCOLCommunication on the network is based on atoken passing protocol. Establishment of thenetwork configuration and

9When any COM20020 senses an idle line forgreater than 82µS, which occurs only when thetoken is lost, each COM20020 starts an internaltimeout equal